PAM4 Reference-Receiver Filter Explorer¶

PCIe Gen6 · IEEE 802.3ck · IEEE P802.3dj¶

Compare the same PAM4 waveform through BT4, fourth-order Butterworth, and an idealized brick-wall response. The controls, three eye diagrams, frequency response, group delay, and time-domain edges all appear in the single-screen lab below.

Brick-wall, Butterworth, and Bessel–Thomson are not interchangeable¶

Scope note: This is an educational model, not PCI-SIG or IEEE compliance software. A complete test also includes the specified pattern, clock recovery, de-embedding, reference equalizer, noise compensation, jitter decomposition, and statistical procedures.

• Brick-wall: an ideal rectangular magnitude response. Everything below the cutoff passes and everything above it is removed. Its sinc impulse response produces pronounced pre-ringing and post-ringing. It is a teaching limit, not a realizable causal analog filter.
• Butterworth: maximally flat magnitude near DC. For the same order and -3 dB bandwidth it normally rolls off faster than Bessel–Thomson, but its group delay is not as flat as BT4.
• Bessel–Thomson: maximally flat group delay with a well-behaved step response. It trades some magnitude flatness and cutoff steepness for lower time-domain overshoot and ringing.

The precise statement is not that PAM4 cannot be measured with a real-time oscilloscope. It is:

A compliance measurement must make the total response of the oscilloscope, probe/fixture, and digital correction reproduce the specified BT4 response. If the native brick-wall response removes frequencies where BT4 still has a meaningful tail, post-processing cannot recover that lost spectrum, and the eye diagram and measured results depart from the reference response.

PAM4 divides the full swing into three eyes, so the ideal adjacent-level spacing is only one third of the total swing. The same noise, ringing, or overshoot therefore consumes a larger fraction of each eye and makes differences in the reference response more visible in eye height, crossings, SNDR, and jitter.

Three applications¶

1. PCIe Gen6: 64 GT/s SNDR¶

PCIe Gen6 64 GT/s PAM4 carries two bits per symbol, so the symbol rate is 32 GBd. PCI Express Base Specification 6.4 §8.3.3.13 specifies a 33 GHz, fourth-order Bessel–Thomson response for the 64 GT/s SNDR measurement to reduce the effect of high-frequency oscilloscope noise; the minimum oscilloscope bandwidth is 50 GHz.

2. PCIe Gen6: 64 GT/s transmitter jitter¶

Section 8.3.5 of the same specification uses the same 33 GHz BT4 response for 64 GT/s transmitter-jitter measurements and notes that de-embedding amplifies high-frequency channel and measurement noise. The observation response both defines a common measurement plane and limits irrelevant out-of-band noise from entering the jitter result.

3. IEEE 802.3ck / P802.3dj: high-speed PAM4 transmitter observation response¶

• IEEE P802.3ck/D3.0 §162.9.3 uses a 40 GHz BT4 response for 53.125 GBd PAM4 transmitter measurements.
• Current IEEE P802.3dj electrical drafts use a 60 GHz BT4 response for 106.25 GBd PAM4.

P802.3dj is still evolving. The 60 GHz value shown here reflects current public task-force material and must be checked again against the controlled draft before compliance work.

Suggested experiments¶

1. Select IEEE 802.3ck, keep the 40 GHz cutoff, and compare the three eye diagrams.
2. Increase Noise RMS from 0% to 5% and compare the noise bandwidth of the brick-wall response with BT4.
3. Increase DDJ p-p and observe how different group-delay responses change the edges and eye width.
4. Set Scope BW equal to the BT4 -3 dB bandwidth. The hardware brick-wall now truncates the gradual BT4 tail too early and cannot reproduce the specified response.
5. Raise Scope BW again and watch the implemented BT4 approach the ideal BT4.

The reported minimum eye height is a center-sampled, 3σ educational metric. It is intended only for relative comparisons within this model and is not the formal pass/fail algorithm of any standard.

Sources and further reading¶

Controlled specifications supplied for this project¶

• PCI Express Base Specification Revision 6.4: §8.3.3.13 p.1490 (64 GT/s SNDR) and §8.3.5 p.1498 (Tx jitter).
• IEEE P802.3ck/D3.0: §162.9.3 p.166 (40 GHz BT4 transmitter observation response).

These specifications are copyrighted and are not embedded in this site. Only clause locations and short paraphrases are provided.

Public primary and vendor material¶

• IEEE P802.3dj public task-force area
• IEEE P802.3dj D2.1 ballot comment resolution showing 60 GHz BT4 wording
• IEEE P802.3dj 2026 model presentation showing a 60 GHz BT4 test-equipment model
• Keysight: IEEE 802.3ck conformance application and 40 GHz BT4 / 59 GHz tracking requirement
• Keysight: testing 1.6T electrical transmitters with a 60 GHz BT reference receiver
• Tektronix: choosing measurement bandwidth and the time-domain role of BT4
• Tektronix DPO7OE: why a native brick-wall can truncate the gradual BT4 roll-off
• Keysight N7004A/N7005A user guide: brick-wall versus BT4 reference-receiver use

Built as a Jupyter Notebook and published as a static, browser-side Python application with Voici, JupyterLite, Pyodide, ipywidgets, NumPy, SciPy, and Plotly.